Photonics at the heart of AI data centres and beyond

AI-driven computing requires efficient optical interconnects to overcome data-centre bottlenecks. imec advances silicon photonics technology to address such a need. Furthermore, ultra-low loss SiN photonics is considered as a key technology to support the next generation quantum-based computing. The same platform can also be used for augmented and virtual reality and bio sensing.

By Leili Shiramin, Portfolio Manager-Integrated Photonics, Joris Van Compenhout, Fellow, Philippe Absil, Vice President, imec

The exponential growth of data generated across industries, combined with the rapidly increasing complexity and scale of AI models, has created significant bottlenecks in both training and inference workloads. As AI systems continue to evolve toward larger parameter counts and more demanding computational requirements, traditional computing infrastructures struggle to provide the necessary bandwidth, latency, and energy efficiency. This challenge has accelerated answering the need for large-scale GPU clusters and high-performance computing (HPC) systems to support next-generation AI factory interconnects. Consequently, both scale-out interconnects, which connect multiple servers and racks, and scale-up interconnects, which enable communication within a server or accelerator domain, is re-evaluated to meet these growing performance demands.

Figure 1:S21 measurement of Ge Photodiode showing 3-dB bandwidth of 110GHz.

Current architectures for building optical communication links generally rely on two major approaches: the “Fast and Narrow” architecture and the “Wide and Slow” architecture. In the Fast and Narrow approach, data transmission is achieved through very high symbol rates over a relatively small number of lanes. This architecture requires digital signal processing (DSP), high-speed DAC/ADC components, and advanced high-speed electronic circuitry (Driver, TIA) to compensate for signal impairments and maintain reliable communication performance.

While this method can achieve high aggregate bandwidth density, it often comes at the cost of increased power consumption, higher latency, and larger system complexity due to the electronic processing involved. In contrast, the Wide and Slow architecture distributes data transmission across a larger number of parallel optical lanes operating at lower symbol rates. Because each lane operates more slowly, the architecture eliminates the need for DSP blocks, DAC/ADC modules, transimpedance amplifiers (TIAs), and high-speed driver circuits. As a result, the Wide and Slow approach offers advantages in terms of lower power consumption, reduced latency, and simplified electronic design. These characteristics make it an attractive solution for future AI and HPC interconnects where energy efficiency and communication latency are becoming design constraints.

However, although the Wide and Slow approach simplifies the electronic subsystem, the associated complexity shifts toward the optical and packaging domain, particularly at the fiber-to-chip interface and in high-density fiber coupling environments. Maintaining low insertion loss, minimizing crosstalk, and achieving scalable manufacturability in dense optical interconnect systems require advanced packaging and coupling techniques. In addition, other set of optical devices and components, such as 32-channel or 64-channel wavelength-division multiplexing (WDM) filters, multiplexers become necessary to manage the large number of optical channels.

Imec, as a technology provider, is developing solutions for both photonic integration architectures. To address the bandwidth requirements of next-generation 400G-per-lane pluggable optics and co-packaged optics (CPO), modifications of existing silicon photonics technology platforms are necessary. For Fast & Narrow, the focus is on achieving the target specification of 110 GHz bandwidth for both modulators and photodiodes and on for Wide & Slow architecture combining active devices operating at several tens of GHz with scalable multi-channel low loss passive photonic components is considered.

At the component level, germanium (Ge) photodiodes continue to remain a preferred technology choice, with the potential to support performance beyond 400G (>110GHz bandwidth). Imec’s recent results, demonstrate an electro-optical 3 dB bandwidth of 110 GHz (Figure 1), while maintaining a responsivity exceeding 0.9 A/W and dark current below 15 nA. The device also exhibits low parasitic capacitance (<10 fF) [1]. When combined with Cu-oxide hybrid bonding technology featuring similarly low parasitic capacitance (<10 fF) and a co-designing with transimpedance amplifier (TIA), these photodiodes enable highly sensitive optical receiver architectures.

For even higher receiver sensitivity, avalanche photodiodes (APDs) are being considered as a future addition to the silicon photonics platform. Initial APD results are highly promising, demonstrating operation up to 180 Gbaud PAM4 in both the O-band and C-band while maintaining bit error rates (BER) below the hard-decision forward error correction (HD-FEC) threshold (Figure 2) [2].

Figure 2: Eye diagram measurements corresponding to responsivity values of 2 A/W and 1.5 A/W for the O-band and C-band APDs, respectively at different data rates of 160 GBaud PAM4 and 180 GBaud PAM4.

On the transmitter side, several modulation technologies are being explored. Candidate technologies include lithium-niobate-on-silicon (LNO-on-Si) Mach–Zehnder modulators (MZMs), III-V-on-silicon electro-absorption modulators (EAMs), as well as silicon-organic hybrid (SoH) modulators. Each technology offers unique advantages and trade-offs. The primary challenges are related to heterogeneous integration complexity, contamination constraints associated with LNO and III-V materials, and passivation, poling complexity, and long-term reliability concerns for SoH devices.

Franz–Keldysh (FK)-based GeSi EAMs and silicon-based micro-ring modulators (MRMs) and MZMs are also being investigated as alternative solutions. However, FK-based GeSi EAMs are limited to C-band operation due to their material bandgap properties, making them more suitable for scale-up connectivity applications only. Silicon-based modulators continue to attract industrial interest because they avoid additional heterogeneous integration complexity and eliminate the need for dedicated fabrication toolsets within CMOS fabs. Nevertheless, achieving the required performance while managing trade-offs among critical device parameters remains challenging for 110 GHz-class devices.

Figure 3: Transmission measurements showing transmit and receive assemblies along with eye diagrams and Bit Error Rate curves.

Figure 4: Above: S21 measurement showing 3-dB bandwidth exceeding 110 GHz.Below: TSV Test structure

The current bandwidth performance of several modulators in imec technology platforms is summarized as follows:

• Silicon MZM (O-band): 75 GHz
• Silicon micro-ring modulator (O-band): >67 GHz [3]
• GeSi EAM (C-band): 110 GHz [4]

Imec continues to further optimize these modulators, with primary focus currently on Si MZMs and LNO-based modulators.

Integration of emerging materials such as lithium niobate onto silicon photonics platforms is being pursued through several approaches, including die-to-wafer (D2W) bonding, wafer-to-wafer (W2W) bonding, and micro-transfer printing (mTP). The results presented in this work for both LNO and III-V integration utilize micro-transfer printing as one of the key heterogeneous integration techniques.

The current status of the LNO modulator (an under-development device in imec) demonstrates a 3 dB bandwidth of 70 GHz, a Vπ·L of 2.5 V.cm, and insertion loss (IL) below 3 dB. The target specifications are 110 GHz bandwidth, Vπ·L below 2 V.cm, and insertion loss below 1 dB. The next phase of development will focus on reducing Vπ·L to below 1 V.cm while maintaining bandwidths exceeding 110 GHz.

Using micro-transfer-printed LNO device integrated on silicon photonics together with high-speed germanium photodiodes, imec demonstrated a 2 km PAM4-modulated O-band optical link operating at data rates up to 320 Gb/s while achieving BER values below the HD-FEC threshold. In addition, the demonstrated circuit incorporates imec’scustom-designed traveling-wave drivers and TIAs, enabling complete end-to-end link characterization (Figure 3) [5].

In the area of passive photonic device development, imec has demonstrated ultra-low-loss polarization beam splitters with insertion loss as low as 0.019 dB and extinction ratios reaching 29 dB. Additional developments include broadband directional couplers supporting 100 nm bandwidth and low-insertion-loss 32-channel wavelength-division multiplexing (WDM) filters with 100 GHz channel spacing. Results for 64-channel devices are expected to be published soon.

The introduction of 3D integration features into the technology platform is also critical for next-generation compact products. Through-silicon vias (TSVs) represent one of the key enabling technologies for efficient power delivery and high-speed signal transmission. Depending on RF loss, bandwidth, and interconnect density requirements, slightly different integration flows are adopted. Figure 4 presents the extracted 3 dB bandwidth of a TSV test structure consisting of Metal + TSV + backside redistribution layer (BSRDL) + TSV + Metal. The measured bandwidth exceeds 110 GHz, making the technology highly suitable for next-generation 3D-interconnected chips used in pluggable optics and co-packaged optics systems.

From the perspective of future optical interconnect evolution, III-V integration on silicon photonics is becoming essential to provide access to gain sections required in certain data center applications or architectures. To address this requirement, imec is actively developing the integration of both laser sources and semiconductor optical amplifiers (SOAs) as part of its roadmap. Initial experimental results demonstrate the strong potential of this heterogeneous integration platform.

Figure 5: Left: Bright-field microscope image of a modelocked laser and Dark-field microscope image of the same laser under 50 mA gain current with forward-biased saturable absorber. Right: RF comb at optimal mode-locking point and Fundamental RF line, measured with resolution bandwidth of 100 Hz.

Beyond optical interconnects, imec is also developing a low loss silicon nitride (SiN) platform to enable emerging application domains. One important development is a fully integrated laser operating at 800 nm, targeting applications such as augmented reality/virtual reality (AR/VR) systems and optical atomic clocks. Figure 5 shows the fabricated device together with butt-coupled

GaAs-based amplifiers operating at 800 nm integrated with saturable absorbers and silicon nitride [6].

These devices successfully generate RF frequency combs after transfer printing, as illustrated in Figure 5, including a zoomed-in view of the fundamental RF tone exhibiting an extinction ratio of approximately 50 dB, currently limited by the measurement noise floor. These results demonstrate the strong potential of the proposed integration methodology for high-power laser applications utilizing the substrate as an efficient heat dissipation pathway.

As the next step toward further technology enablement and increased maturity level across multiple application domains, imec will continue advancing chip-to-chip interconnection technologies to help address emerging industry challenges.

References:

• [1] C. Coughlan et al, OFC 2026.

• [2] A. Shahin et al, OFC 2026.

• [3] A. Ostrovskis et al, Opt. Express, 2025.

• [4] C. Bruynsteen et al, ECOC 2025.

• [5] J. Declercq et al, ECOC 2025

• [6] M. Kiewiet et al, LPR, 2025.