Kyocera advances SiPh isolator integration
Laser annealing enables optical isolators to be integrated onto silicon photonics chips while minimising thermal damage to surrounding circuits.
Kyocera and Tohoku University’s Research Institute of Electrical Communication have demonstrated a technology for integrating optical isolators directly onto silicon photonics integrated circuits using localised laser annealing.
Optical isolators use magneto-optical garnet to suppress back-reflected light, but the material typically requires heat treatment at around 600°C or higher. Applying this temperature across an entire silicon photonics chip risks damaging electrodes, wiring and other components.
The new approach uses a near-infrared laser to heat-treat only the region containing the garnet film, measuring approximately 700 × 700 microns.
This enables the material to crystallise with the properties required for optical isolation while minimising thermal impact on surrounding circuits.
The research team fabricated and experimentally demonstrated an optical isolator based on light interference. Tests achieved an isolation ratio of 13.6 dB in the optical communications wavelength range, corresponding to an approximately 95% reduction in back-reflected light.
The technology could support the integration of optical isolators into silicon photonics chips, addressing a key manufacturing challenge for photonic integrated circuits.
