SK hynix advances CPO roadmap
SK hynix has outlined a co-packaged optics architecture that uses a photonic interposer to connect processor and memory pools, pointing to a future role for optical connectivity deeper within AI computing systems.
The roadmap, developed with researchers from several universities and published in Nature Electronics, describes a system in which optical links connect separate pools of processors and memory.
The approach is intended to address growing data-movement requirements in AI systems, where increasing numbers of accelerators and memory resources create bandwidth, power and signal-integrity challenges for conventional electrical interconnects.
At the centre of the proposed architecture is a photonic interposer that connects computing resources in an XPU pool with a separate memory pool.
This could allow processors to access larger and more flexible memory resources rather than relying solely on HBM physically attached to each accelerator. The architecture remains a technology roadmap rather than a commercial product.
The development highlights a potential shift in the role of photonics within AI systems. While CPO is increasingly being considered for integrating optical engines closer to switching silicon, the SK hynix roadmap places optical connectivity deeper within the compute and memory architecture.
Electrical interconnects face increasing power consumption, heat generation and signal-integrity constraints as data rates and communication distances increase.
CPO addresses part of this challenge by moving optical conversion closer to the processor or switching silicon, reducing the distance over which high-speed electrical signals must travel.
The proposed architecture also reflects the growing convergence between photonic integration and advanced packaging. A photonic interposer capable of linking processors and memory would require close integration of optical and electronic components alongside high-density packaging technologies.
The roadmap comes as CPO moves closer to commercial deployment in AI infrastructure. The source notes that CPO has already progressed beyond laboratory demonstrations, with production applications emerging for networking switches.
For photonic integrated circuit development, the significance lies in the potential expansion of optical connectivity from system-level networking toward processor and memory interconnects.
Such architectures could increase the number of optical interfaces within future AI systems while creating new requirements for photonic interposers, optical engines, laser sources, fibre coupling and high-density integration.
SK hynix's roadmap therefore points to a longer-term evolution in which photonics becomes increasingly embedded within the architecture of AI computing systems rather than remaining primarily at the network interface.
