Optical switching: faster, smaller, and more frugal
Network traffic is rising, driven in the main by a rise in internet traffic. This had led to an increase in the transmission of data-packets, which contain a header section with address information, plus a payload detailing information content. To cope with increases in data transfer, system manufacturers are developing electronic packet switches. But these packet switches are a short-term fix: they are power hungry and they are not suited to scaling to higher bit rates. Turning to photonic packet switching could address these issues, and it has another benefit too – it is the only technology that can realize packet switching at ultrahigh bit rates. Photonic packet switching could also aid other applications, particularly computing. Optical technology is already being deployed in ever-shorter links, and in the future there is a high likelihood that this will be used to boost the bandwidth and power efficiency in computers. The next step after this will be progression from simply the transportation of data in the optical domain to its manipulation too. This will deliver a massive pay-off, because it will eliminate the need for conversion between the electrical and optical domains. Thanks to the promise of optical switching in various applications, several research groups have been looking seriously at this technology for about a decade. During this time researchers have realized one of the major weaknesses of all-optical packet switching is the omission of large optical random access memories, which are needed for buffering. Efforts have tended to focus on realizing buffering through various delay lines, such as slow-light waveguides, and recirculating fiber loops. However, buffering times have to be relatively short if the signal is not to be degraded by attenuation or distortion. There are also concerns relating to the footprint and power consumption of delay-linebased buffers. This has led to the need to compromise between the different figures of merit. To make matters worse, other devices for optical switching and routing, such as wavelength converters, are usually based on one or more semiconductor optical amplifiers with a large power consumption and a substantial footprint. And to top it all, it is extremely difficult and unpractical to integrate several switches, delay line buffers, wavelength converters and gates together into practically useable photonic integrated circuits (PICs) for optical packet switching. However, despite these challenges, progress is being made, thanks in part to recent developments in heterogeneous integration of InP-based devices onto silicon-on-insulator (SOI ) passive circuits, and small, lowpower lasers that can be achieved using this approach. 
Figure 1. Microdisk lasers could provide a key building block for next-generation optical switches that set a new benchmark for speed, low-power consumption, and a small footprint. These tiny lasers are united with silicon-oninsulator waveguides, with coupling provided by a grating coupler (a). A scanning electron microscopy image reveals the various layers in the structure (b). Light-voltage curves show the two competing modes produced by the microdisk laser, which has a 7.5 μm diameter (c). Lasing spectrum for the CW mode at a bias of 3.8 mA (d) . All powers are calculated inside the SOI waveguide by taking into account the coupling efficiency of the grating coupler. (From: L. Liu, et al,, ‘An ultra-small, low power all-optical flip-flop memory on a silicon chip’, Nature Photonics, ISSN , 1749-4885, 4 182-187, March 2010) Our European team is capitalizing on this success and developing low-power, small-footprint PICs for all-optical packet switching through a project called HISTORIC – heterogeneous InP-on-silicon technology for optical routing and logic. This program, which kicked off in July 2008 and has 2.3 million Euros of funding from the European Union, is a two-pronged effort: PICs comprising microdisk lasers and resonators; and photonic-crystalbased lasers heterogeneously integrated onto SOI wafers and interconnected by silicon wire waveguides. Four partners are involved in the project: imec-Ghent University, Belgium, which is acting as the coordinator; CNRS-LPN (Laboratory of Photonics and Nanostructures), France; the Technical University Eindhoven (TUe), the Netherlands; and IBM Zurich Research Labs, Switzerland. All partners are collaborating on the design of the PICs. The fabrication and technological development of the microdisk-based PICs is taking place in the clean rooms of imec-Ghent University, while the facilities at CNRSLPN and TUe are being used to create photonic crystalbased PICs. The PICs are to be used by IBM and the systems group at TUe to perform the systems experiments and evaluate the quality of various architectures. For the individual building blocks, such as the all-optical flip-flops and gates, a footprint of less than 200 μm2 is targeted. Scaling to these device dimensions should lead to record low switching times of tens of picoseconds and switching energies below 10 fJ.
Together with the small footprint and low propagation loss in the silicon wire waveguides, this promises to create optical packet switches with competitive speeds and very low power consumption. Tiny lasers Major strides in this direction were made in the first year of the project. This included the fabrication of 7.5 μm diameter, microdisk-lasers that form all-optical flip-flops, which were coupled to silicon wire waveguides (Fig. 1). This is the first electrically pumped, all-optical flip-flop on silicon fabricated using CMOS technology (a detailed report is provided in our Nature Photonics paper published earlier this year). Switching occurs between predominant clockwise and anticlockwise lasers modes, and can be realized with switching times and energies of just 60 ps and 1.8 fJ. 
Figure 2. The microdisk laser wavelength converter has a higher bit-error-rate at 20 Gbit/s The threshold current of our microdisk lasers is only 0.33 mA. Between threshold and 1.7mA these lasers have two competing modes, but at a higher drive current they are bi-stable (see Fig. 1). A further reduction of the threshold current and the operating current (at which bi-stability is obtained) should be possible by shrinking disk dimensions, increasing the current injection efficiency, and cutting the various reflections that lead to coupling between clockwise and counter clockwise modes. The same disk lasers that are used as all-optical flip-flop memories have also been demonstrated as all-optical gates and all-optical wavelength converters, which currently operate at up to 20 Gbit/s. The small footprint and lower power consumption associated with microdisk lasers enables a new level of performance, in terms of Gbit/s/mW μm2. The bit error rate for this technology is suitable for the target applications (see Fig. 2). At a 10 Gbit/s speed the converter operates error free, and at 20Gbit/s the bit error rate is below 10-3, which is considered sufficient for systems employing forward error correction. All these results were presented in more detail at the 2010 Optical Fiber Communications Conference. A further success of HISTORIC is the fabrication of the first InP-membrane photonic crystal laser heterogeneously integrated onto SOI. This novel device holds the key to a step-change in the performance of an all-optical flip-flop. Microdisk-laser-based, all-optical flip-flops promise to deliver power consumption below 1 mW, combined with switching energies of a few fJ and a footprint of just a few hundred microns squared. But equivalents based on photonic crystal lasers should realize power consumptions that are an order of magnitude lower, alongside a footprint of just a few tens of microns squared. Efforts directed at fabricating photonic crystal lasers heterogeneously integrated onto SOI are being led by CNRS-LPN and TUe. LPN has so far concentrated on the coupling of photonic crystal lasers to photonic circuits implemented in SOI. Coupling is tough, due to the very small mode size of the photonic crystal lasers, but the first InP-based photonic crystal lasers heterogeneously integrated onto silicon-on-insulator have been demonstrated (see fig. 3). 
Figure 3. Scanning electron microscopy images show the alignment of the InP photonic crystal to the silicon waveguide Pumping the lasers with short pulses from a titaniumsapphire source produces lasing. Emission from the photonic crystal lasers was coupled evanescently into single-mode silicon waveguides (see fig. 4). Coupling to single mode fiber was, just as for the microdisk lasers, realized with surface grating couplers. 
Figure 4. The photonic crystal laser can realize lasing via optical pumping The TUe is focusing on electrical pumping of InPmembranes with a thickness of less than 200 nm. The key to this approach is micro-scale integration of active and passive components with a transparent, highresistance layer. This layer is in the center of the membrane, outside the active region, and it acts as a current-blocking layer between the n and p-type contact layers. By employing a current-blocking layer everywhere except in the active region, it is possible to create an “electrical pin-hole” for funneling all the current flow through the region. This design enables the electrodes to be placed far enough from the laser cavity, with an efficient current injection in the active region. Future goals for the HISTORIC project include: the fabrication and testing of PICs implementing combinatorial logic such as NAND, XOR, and other gates; and sequential logic such as D-latches or optical shift registers. IBM, TUe and IMEC have already conceived several inventive designs for all-optical logic circuits, making use of interconnect microdisk lasers and gates. These components should be ready within a matter of weeks, and will be tested extensively in the following months. If progress goes according to plan, this will pave the way for the realization of large-scale, low-power, small footprint PICs for all–optical packet switching and routing. This article was written by the HISTORIC project team.
