Ayar Labs announces additions to leadership team
Ayar Labs, a company developing silicon photonics solutions for chip-to-chip connectivity, has announced two additions to its board of directors: Ganesh Moorthy, president and CEO of Microchip Technology, and Craig Barratt, former CEO of Atheros and current chair of the board of Intuitive Surgical. The company also announced that cofounder Vladimir Stojanovic has been named chief technology officer (CTO).
“Ganesh, Craig, and Vladimir are powerhouse additions to our team, and each will play a critical role as we move our technologies into production maturity,” said CEO Mark Wade. “Their collective knowledge and experience will help us accelerate our roadmap leadership, and deliver the transformative value of optical I/O in AI systems, high performance computing, and next-generation datacentre system architectures.”
Moorthy has more than 40 years of executive leadership and semiconductor industry experience. In addition to his role as president and CEO of Microchip Technology, Moorthy serves on the board of the Semiconductor Industry Association, the Global Semiconductor Alliance, Rogers Corporation, and Celanese. Previously, he held several senior leadership roles at Intel Corporation.
“The work Ayar Labs is doing to make optical I/O a reality is essential to the forward progress of the entire industry,” said Moorthy. “By addressing the performance and power bottlenecks of traditional electrical-based interconnects, Ayar Labs will help unleash the full potential of everything from AI and 6G networks to disaggregated datacentres and so much more. I look forward to helping Ayar Labs expand its reach across the ecosystem as the company moves into its next phase of growth.”
Barratt has an accomplished career as a technology entrepreneur and board member. As CEO of Atheros, he completed a successful IPO and ultimately sold Atheros to Qualcomm for $3.1 billion. He also served as CEO of Barefoot Networks, which was acquired by Intel. In addition to his entrepreneurial career, he has held executive positions at Google, Qualcomm, and Intel, and he currently serves as the chair of the board for Intuitive, IonQ, and Calysta.
“Optical I/O solves long-standing data movement challenges in computing systems,” said Barratt. “With the dramatic bandwidth and performance needs in AI systems, a new generation of foundational technologies and products are needed. Ayar Labs’ leadership in breakthrough optical I/O solutions enables system performance that is not possible with alternative approaches. I look forward to leveraging my background in bringing new semiconductor technologies to market to accelerate the company’s growth.”
In addition to cofounding Ayar Labs and serving as its chief architect, Vladimir Stojanovic is the cofounder of NanoSemi, which was acquired by MaxLinear. Most recently, he served as professor of electrical engineering and computer sciences at the University of California, Berkeley, and he was also an associate professor at MIT from 2005-2013. Stojanovic was recently named an IEEE Fellow for his contributions to electronic-photonic design and system-on-chip integration.
Ayar Labs hopes these additions to its leadership team will build on the company’s momentum in 2023, including technology developments and progress with customers and partners. The company showcased a 4 terabit-per-second (Tbps) optical solution – which it says is the industry’s first – moving data from one TeraPHY optical I/O chiplet to another at 2 Tbps in each direction powered by Ayar Labs’ SuperNova light source. The company says it can achieve this data transfer at the latency and power efficiency needed for data-intensive workloads such as generative AI, machine learning, and more while also supporting novel disaggregated compute and memory architectures.
Ayar Labs also recently demonstrated its in-package optical I/O solution integrated with Intel’s Agilex FPGA technology. According to the company, this new optically enabled FPGA promises 5x the current industry bandwidth at 5x lower power and 20x lower latency, all packaged in a common PCIe card form factor.