PIC platforms: A question of choice
There are several different materials being used to make photonic integrated circuits, with two of the most common being silicon and indium phosphide. For companies designing PICs, therefore, a major question is: which material is better?
An interview with Julie Eng, Chief Technology Officer at Coherent.
LAURA HISCOTT: Indium phosphide (InP) PICs have historically had concerns over yield. Is that still an issue?
JULIE ENG: In general, I would say that the III-V industry hasn’t historically had the same level of investment in tools, wafer volume, and yield improvement as the silicon (Si) industry. However, the yields in III-V devices have definitely improved over time as the optics industry has matured. We’ve increased our wafer sizes and higher volumes have been shipped. We at Coherent recently had a public announcement that we’ve shipped over 200 billion gallium arsenide (GaAs) VCSELs. That’s GaAs and not InP, but the reason I point to it is that it’s III-V lasers and it’s a public data point.
The total volume of InP is lower than GaAs, but still very significant and much higher than 10 years ago. So that gives us a lot of data and also a lot of motivation to improve yields. Overall, the yield of InP PICs has definitely improved over time in a way that can make those solutions viable in transceivers – that’s why you see them in transceivers today.
LAURA HISCOTT : Is there a sweet spot for the level of integration of InP PICs? That is, if InP PICs are large and contain many components, is there a price to pay for their complexity?
JULIE ENG: To talk about the sweet spot for InP, it’s important to look at the trade-off between InP and silicon photonics (SiPh). The main advantages of InP are, first, that the laser and the modulator are integrated; they’re in the same die, so the coupling loss between them can be very low. Second, due to material properties, modulators in InP are more efficient than modulators in silicon. In InP PICs you can also integrate, if you choose to, semiconductor optical amplifiers (SOAs). So InP is generally a great fit for the applications that need high optical power – because you can have an integrated SOA – and also the most complex applications that really care about performance.
SiPh, on the other hand, has the advantage that the passive optical devices can generally be made smaller in size than in InP, again due to physical differences in the material properties. Additionally, silicon foundries are on larger wafer sizes, and generally have very high-yielding processes, and mature metrology and test. All of this should result in a lower die cost for some applications.
What I see as the sweet spot for InP PICs is primarily where key electro-optic performance parameters such as optical power and modulator efficiency are paramount and valued. In an application that might have a lot of passive optics in it, if the performance of the SiPh die is good enough, then the die size might be smaller and the cost lower if you use a SiPh PIC. It’s a case of looking at the detailed requirements of the application and choosing the best-performance, lowest-cost solution for the application.
Industry’s first 140 GBaud integrated coherent transmitter-receiver optical subassembly (IC-TROSA) from Coherent.
LAURA HISCOTT: For silicon PICs, can the level of integration be higher?
JULIE ENG: The answer depends on how you define integration, and also to some extent on the application. Specifically, as I mentioned, passive optical devices can generally be smaller in silicon. If you’re going down the path of having an InP PIC, you can have a laser, a modulator, and an optical amplifier integrated in the PIC. But, because the passive optics will be larger in an InP PIC, you might choose to do what we call free-space optics, where the passive optics are not part of the PIC, but are separate elements. If you did that, then you might say the InP solution is less integrated than the SiPh solution.
But on the other hand, silicon doesn’t lase, so you always need an InP laser when you make a SiPh solution. In that case, you might say the SiPh PIC is less integrated. Another example is if you need amplification, the amplifier can be integrated in the InP solution. But in the silicon solution, in most cases, you’d have a separate amplifier, such as a micro EDFA (erbium-doped fibre amplifier). In this case, SiPh PIC would be a less integrated solution than the InP PIC.
So, again, it’s this situation where you have to ask: what is the application? How am I defining the word integration? I think there are cases where a SiPh PIC will be more integrated and there are cases where you would say the InP PIC is more integrated.
LAURA HISCOTT : Some will argue for InP PICs and others for silicon, but you see a role for both. Why?
JULIE ENG: A lot of people want to make it an either/or. My view is it’s an “and.” I ran transceiver engineering for Finisar for almost two decades. We needed to innovate new technologies and design, qualify, and deliver optical transceiver products year after year, as data rates increased, as the customers and the specs and the applications changed over time. From that experience, I know that there’s no one-size-fits-all technology for optics. To me, InP and SiPh are two tools in the toolbox. One thing that people sometimes forget is that every time someone says SiPh, there’s always an InP laser in there anyway, so InP and SiPh are always together.
To be more specific, a great example is our own coherent optics transceiver product line. Within that one product line, we use both InP PICs and SiPh PICs, but we use them for different products. For instance, at ECOC 2023 we showed our 140GBaud IC-TROSA. For that, we use an InP PIC, because the transceiver is in an application that favours performance. We also showed our QSFP28 ZR transceiver, which is a 100 km 100G coherent optics product. In that product, we use SiPh, because, for that application, the SiPh performance is good enough and the focus is really on cost and size, so the integration of the passives really matters.
Of course, we make our decisions based on the tools in our toolbox. Every transceiver manufacturer might have different decision-making criteria, based on what they have in-house and what they don’t. For a vendor who has an InP capability, but not a SiPh design team, it might make more sense to continue to use InP in products that I might choose to use SiPh in, just because they might not want to invest in the R&D to bring up a SiPh design capability. On the flip side, a transceiver manufacturer who has SiPh design capability but doesn’t have in-house InP might be more inclined to choose SiPh for things I might choose InP for.
Our strategy at Coherent is to have all the capabilities, so we can objectively choose the right technology for a product on a product-by-product basis, because we’re the number one maker of optical transceivers in the world, so we’re going to make all the different types of transceivers.
Coherent 100G QSFP28 0 dBm DCO transceiver for edge and aggregation networks.
LAURA HISCOTT: For those wishing to produce InP and silicon PICs, production can be done in partnership with foundries and via in-house manufacture. For both technologies, are there benefits to vertical integration? And does volume have an impact on the appropriate approach?
JULIE ENG: The silicon industry is primarily a foundry-based industry, and the majority of integrated circuit (IC) companies don’t own fabs anymore. A few big ones still own fabs, but many huge IC companies are fabless, and rely on foundries for both the chip manufacturing and packaging. The reason is, of course, the fabs are very expensive to invest in, so it doesn’t make sense anymore for most IC companies to own their own fabs. The volume is therefore aggregated in a few big foundries. SiPh follows that model; it’s relatively straightforward to get access to very high quality and reasonably-priced SiPh PICs from tier-one silicon foundries, so, from my perspective, it doesn’t make sense for us to own an in-house SiPh factory. A lot of people doing SiPh are using a foundry model, although a few people have something very specialised and they do that portion in house. For us, we’re not a silicon foundry and we don’t have any other silicon manufacturing, so it makes sense to utilise the foundries.
On the InP side, there are InP foundries, but in general they’re not as mature as the InP manufacturing capability that’s inside the optical companies today. And the InP foundries are also generally not as mature as the silicon foundries in terms of maturity of PDKs (process design kits). This can be a challenge, particularly when you’re considering making a device like a PIC, which is much more complex than a standalone laser. For us, since we already own multiple InP fabs, it makes sense for us to do that in house. And I think most of the people doing InP PICs are doing them in house.
In either of those situations, volume definitely matters. That’s why a lot of people don’t have in-house silicon fabs anymore – because the volume is so aggregated at a few fabs that, if you own your own, you’re operating at a disadvantage. The same is true in InP; a fab that is not running fully utilised is never good. That adds to the cost of the die, because the fixed cost has to be amortised over the volume. This could change the economic part of the decision of InP versus SiPh for some vendors.
LAURA HISCOTT : SiPh requires the addition of a light source. How do you view the various approaches for incorporating a laser onto the silicon chip?
JULIE ENG: There are two main approaches. The first is a totally hybrid approach, in which you have an InP laser that’s a physically separate die from the SiPh die. The advantage of this is it’s the most straightforward option. You don’t have to have special processes in your SiPh foundry; you can either fabricate or buy the InP die and then separately either design a SiPh device yourself and buy it from a foundry, or buy it from one of the SiPh die vendors. Then, you integrate them together in the package. A positive side of that is, if you have a yield hit on your InP laser, it doesn’t affect the PIC yield, and vice versa.
But the disadvantage is that the light from the InP device has to be coupled from the laser into the SiPh waveguide, for example through edge coupling or grating coupling, and there’s loss associated with that, which impacts performance. There’s also a financial cost to do that, as you have to physically align things. Several SiPh companies and foundries have now started to integrate III-V materials, specifically InP, into their SiPh process to provide the light generation. Depending on the process, there are different ways of integrating it. Some people use the III-V material only for the light generation, while others use III-V materials for modulators, or potentially even integrating amplifiers or photodiodes into the SiPh process.
This approach holds the promise of using InP for what it’s good at, and using silicon for what it’s good at, but doing it in a single-die solution. That has a real allure to it; it eliminates the coupling loss and the cost of coupling. But the major downside is that this technique still somewhat new, and it’s obviously more complex than SiPh without integrated III-V materials, so presumably it’s higher cost. Also, only a few of the fabs offer this capability, so, because there’s less competition, that could lead to higher pricing. And, the yield is going to be aggregated, so anytime a laser doesn’t yield, you’re going to throw away a SiPh PIC and vice versa, so there’s an economic calculation there. The question is, in the end, is that approach less expensive than just having an InP CW laser separate from your SiPh PIC? The economics of that may be different for different companies and applications.
Finally, there are some research groups working to grow III-V materials directly on silicon, but I see that as much further out. The two primary approaches right now are either fully discrete or III-V integrated into the SiPh process, and you see different companies making different decisions.