Wafer-level nanoimprint technology for innovative packaging
The need for high-speed data transfers with low-power consumption and low latency in data centers, telecom networks, sensors and emerging applications in advanced computing for artificial intelligence (AI) is growing exponentially. More than ever, we rely on these applications to ensure a safer and more productive world. All across these markets, silicon photonics (SiPh) play a key role in enabling ultra-high bandwidth performance. As a result, it is more important than ever to develop solutions that can cost-effectively scale up the production of silicon photonics.
By Andrea Kneidinger, EV Group
While the wafer manufacturing capabilities for SiPh have matured through the use of standard semiconductor mass production processes and existing infrastructure, packaging solutions for SiPh remain a key bottleneck to mass commercialization.
Production capabilities for SiPh are still behind and lack scalability compared to wafer fabrication. The main limiting factor is the fiber to chip assembly, where companies today often rely on very complex solutions; for example, direct fiber bonding on chip with adhesive through active alignment or high-precision tools. These factors limit the wider deployment of SiPh. To solve this challenge, EV Group (EVG) teamed up with Teramount to develop optical microstructures using a simple, reliable and cost-effective wafer-level replication process that enables the production and scaling up of complex structures to high volumes. This replication process, known as nanoimprint lithography (NIL), helps to simplify, miniaturize and standardize the optical interface to bridge the gap in SiPh packaging toward wafer-level high-volume manufacturing (HVM).
NIL is a precise replication technique that has shown to be ideally suited to facilitate the patterning of microstructures with challenging geometries, required for emerging devices and applications across the photonics market. This technology is very flexible and can produce a wide range of shapes and structures, such as mirrors, prisms, spheric and aspheric lenses, micro lens arrays as well as various types of diffractive structures. Supported dimensions can be freeform and range from single nanometer resolution up to millimeter lateral extent. These 3D structures are replicated in a single step, which is ideally suited for the photonics industry, where light matter interaction relies largely on shape and geometry.
A further key asset of NIL is the straightforward transfer of these complex and high-precision structures to HVM as hundreds or thousands of structures can be replicated with high fidelity over a large area in a single step. Overall, wafer-level NIL represents an efficient and low-cost non-conventional lithography method capable of replicating complex micro- and nano-scale structures, particularly wafer-level optics (WLO).
Step and Repeat Mastering: scaling NIL from single die to fully populated master
Step-and-repeat (S&R) NIL is a key enabling technique for manufacturing wafer-level micro- or nanostructures because it bridges a crucial gap between die-level designs and wafer-level production. In particular, it allows the scaling of structures that were previously prototyped on areas measuring in the square-millimeter range to fill full 200-mm or 300-mm wafers. The main challenge with S&R NIL is that the quality of the initial master stamp defines the success of subsequent production, so the quality of the single-die master must be preserved. Therefore, it is necessary to take a master mold of a single die — written with either an electron beam, direct laser writing, or two-photon polymerization — and replicate it exactly hundreds or even thousands of times to produce full-area masters for 200-mm or even 300-mm wafer production lines (see Figure 1).
To address this need, EVG has developed the EVG770 S&R NIL system, which enables precise replication of micro- and nano-patterns for large-area master stamp fabrication used in HVM. It dispenses the resist, aligns the structures, imprints accordingly and demolds in a fully automated procedure. To support the most advanced mastering requirements, the S&R system includes full process control, with precision alignment within 250 nm, and is capable of positioning every structure next to alignment patterns. All process steps — from dispensing, imprint, curing, and demolding — must also be performed precisely and monitored within a single environment to allow optimal feedback control.
This not only avoids the impact of external sources such as airborne particles or temperature changes that can lead to imperfections, but it also enables the creation of both a wafer-level master with optimal quality and exact replicas of every single die that can then be applied to wafer-level manufacturing.
With every replication step — from single die to S&R master to working stamp and final imprint — some changes in pattern dimensions are inevitable, due to shrinkage of the polymers caused by crosslinking during the UV curing process. These changes are predictable, some steps can even compensate for each other, and the deviations from the original design are very repeatable for a given set of materials. Thus, compensation can be calculated into the master design. Flexible fabrication methods, such as 2GL (two photon greyscale lithography) or e-beam, support such design changes as well as short iteration times.